Computer architectures are now more parallel and heterogenous than ever. However, balancing programmability, portability and performance (3P) is still challenging. A large number of programming models, programming frameworks and execution models have been proposed, with the promise to solve these issues. Still, a large effort is also put by applications and developers to overcome the challenges of interoperability of these frameworks. In the meantime, applications still fear that the newly implemented code will not be able to work in future machines.
In an era of extreme heterogeneity, the current programming and system infrastructure do not seem to have a convincing solution to the 3P problem. Furthermore, if we want to be able to provide software modularity, there must exists a clear distinction between the semantics of the execution model, and the user application, such that they can be evolved independently. In this talk we provide an argument that if we want to evolve computer systems, software tools and applications for the 3P problem, a well-defined defined program execution model should be vertically integrated across all the components of the system (i.e., Architecture, middleware, operating systems, compilers, libraries, programming models, etc.).
Additionally, through a view of evolution of computers, and some success examples, we support this argument. Finally, while the intention of this talk is to encourage discussion around the topic, a possible PXM is presented as a potential solution to the 3P problem.
Bio: Jose Monsalve Diaz
Jose M Monsalve Diaz is a postdoctoral appointee in Argonne National Laboratory working on exploring innovative ideas on future computer architectures. He obtained his PhD in Electrical and Computer Engineering from the University of Delaware in 2021. His work defined the Sequential Codelet Model, a program execution model for future parallel, heterogeneous and distributed computers based on principles of Dataflow models of computation. Jose M Monsalve Diaz obtained his Masters in Electrical and Computer Engineering from the University of Delaware in 2020, and his bachelor’s degree in Electronics Engineering from the Pontificia Universidad Javeriana in 2013. Prior to being a postdoc, he was a student in the GRP program at Argonne National Laboratory for 2 years. He has also worked as a research assistant for the CAPSL research group working with Prof Guang. R. Gao, and the CRPL research group working for Prof. Sunita Chandrasekaran. His areas of interest are parallel computer architecture design, parallel computer systems and parallel programming models. He has worked on validation and verification of OpenMP target offloading, as well as with OpenACC programming targeting CPU and heterogeneous systems based on GPGPUs. Other projects also involved unconventional Data-flow based programming models and computer architectures. His current efforts focus on answering the question that in an extremely heterogenous, parallel and distributed environment, how computer system architectures should be organized, and how program execution should be defined and orchestrated in these systems in order to achieve performance, programmability and portability.