TensorFlow Optimizations on Modern Intel Architectures

Vamsi Sripathi and Vikram Saletore, Intel
Webinar
July Dev Session

This interactive webinar will provide an overview of the optimizations implemented by Intel to accelerate the performance of the TensorFlow framework for Intel Xeon and Xeon Phi architectures. These will include the usage of Intel Math Kernel Library’s Deep Neural Network API’s in TensorFlow, optimization of data flow graph, and ideal runtime settings. 

Intel engineers, Vamsi Sripathi, and Vikram Saletore, will cover performance results demonstrating significant gains over baseline TensorFlow for popular deep learning topologies, along with a couple of scientific case studies in single and multi-node configurations.