The deep learning era has introduced a perfect storm of technological advances that are challenging even the most modern von-Neumann architectures in terms of performance and efficiency. The typical von Neumann approach to AI expends up to 90% of the energy consumed in a single multiply-accumulate operation in the wires moving data, rather than in the switching of the transistor itself. A new architecture is needed to respond to the changing landscape of high-performance computing and artificial intelligence computation, and enable the next generation of scalable processors.

In this talk, we will explore how our implementation of At-Memory Computation addresses the fundamental issue, and why minimizing data movement is the most important factor in creating an efficient neural network inference processor.