The sustained growth of computing resources in HPC systems also requires to deal with increasingly complex memory structures and trade-offs. Contemporary shared memory systems typically embed a cache hierarchy, local and remote memories linked with various interconnection network topologies, and soon non-volatile memory. Accessing the whole memory hierarchy is transparent to the user, however, the temporal, spatial and sharing patterns of applications with respects to threads scheduling and memory allocation have a direct impact on data locality in the har dware and thus on applications performance. In this talk we detail some of the mechanisms involved in hardware and software locality and solutions to map both of them. We then detail our contributions in modeling systems upper-bounds with a focus on locality, online application modeling with emphasis on interactions between the system structure and applications threads, and finally application classification for predicting preferred thread and memory allocation policies.